Publications
Selected Papers
• [arXiv] S. Machetti, D. Pasquale, L. Orlandic, D. Huang, D. Kasap, G. Ansaloni, and D. Atienza. “e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications.” arXiv preprint arXiv:2505.08421 (2025).
• [IEEE D&T] D. Atienza, K. Zhu, D. Huang, and L. Costero. “A 20-Year Retrospective on Power and Thermal Modeling and Management.” IEEE Design & Test, 2025.
• [TPDS] D. Huang, L. Costero, and D. Atienza, “An Evaluation Framework for Dynamic Thermal Management Strategies in 3D MultiProcessor System-on-Chip Co-Design,” IEEE Transactions on Parallel and Distributed Systems (TPDS), 2024.
• [CCGrid] D. Huang, L. Costero, and D. Atienza, “Is the powersave governor really saving power?,” 24th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid), 2024.
• [TSUSC] D. Huang, L. Costero, A. Pahlevan, M. Zapater, and D. Atienza, “CloudProphet: A Machine Learning-Based Performance Prediction for Public Clouds,” IEEE Transactions on Sustainable Computing (TSUSC), 2024.
• [TACO] Q. Liu, D. Huang, L. Costero, M. Zapater, and D. Atienza, “Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads,” ACM Transactions on Architecture and Code Optimization (TACO), 2024.
• [VLSI-SOC] R. Medina, D. Huang, G. Ansaloni, M. Zapater, and D. Atienza “REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal.” 31st IEEE Conference on Very Large Scale Integration (VLSI-SOC), 2023.
• [TCAD] D. Huang, A. Pahlevan, L. Costero, M. Zapater, and D. Atienza, “Reinforcement learning-based joint reliability and performance optimization for hybrid-cache computing servers,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.
• [ISCA Workshop] D. Huang, L. Costero, F. Terraneo, M. Zapater, and D. Atienza, “Accurate thermal modeling of heterogeneous multi-core processors,” HotSpots Strike Back Workshop on International Symposium on Computer Architecture, 2022.
• [TCAD] D. Huang, A. Pahlevan, M. Zapater, and D. Atienza, “COCKTAIL: Multicore co-optimization framework with proactive reliability management,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.
• [TODAES] H. Wang, T. Xiao, D. Huang, L. Zhang, C. Zhang, H. Tang, and Y. Yuan, “Runtime stress estimation for three-dimensional IC reliability management using artificial neural network,” ACM Transactions on Design Automation of Electronic Systems (TODAES), 2019.
• [TCAD] H. Wang, D. Huang, R. Liu, R. Liu, C. Zhang, H. Tang, Y. Yuan, “STREAM: Stress and thermal aware reliability management for 3-D ICs,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018.
